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Implementing RLWE-based Schemes Using an RSA Co-Processor

Authors:
Martin R. Albrecht , Information Security Group, Royal Holloway, University of London
Christian Hanser , Infineon Technologies Austria AG
Andrea Höller , Infineon Technologies Austria AG
Thomas Pöppelmann , Infineon Technologies Austria AG
Fernando Virdia , Information Security Group, Royal Holloway, University of London
Andreas Wallner , Infineon Technologies Austria AG
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DOI: 10.13154/tches.v2019.i1.169-208
URL: https://tches.iacr.org/index.php/TCHES/article/view/7338
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Presentation: Slides
Abstract: We repurpose existing RSA/ECC co-processors for (ideal) lattice-based cryptography by exploiting the availability of fast long integer multiplication. Such co-processors are deployed in smart cards in passports and identity cards, secured microcontrollers and hardware security modules (HSM). In particular, we demonstrate an implementation of a variant of the Module-LWE-based Kyber Key Encapsulation Mechanism (KEM) that is tailored for high performance on a commercially available smart card chip (SLE 78). To benefit from the RSA/ECC co-processor we use Kronecker substitution in combination with schoolbook and Karatsuba polynomial multiplication. Moreover, we speed-up symmetric operations in our Kyber variant using the AES co-processor to implement a PRNG and a SHA-256 co-processor to realise hash functions. This allows us to execute CCA-secure Kyber768 key generation in 79.6 ms, encapsulation in 102.4 ms and decapsulation in 132.7 ms.
Video from TCHES 2019
BibTeX
@article{tches-2019-29047,
  title={Implementing RLWE-based Schemes Using an RSA Co-Processor},
  journal={IACR Trans. Cryptogr. Hardw. Embed. Syst.},
  publisher={Ruhr-Universität Bochum},
  volume={2019, Issue 1},
  pages={169-208},
  url={https://tches.iacr.org/index.php/TCHES/article/view/7338},
  doi={10.13154/tches.v2019.i1.169-208},
  author={Martin R. Albrecht and Christian Hanser and Andrea Höller and Thomas Pöppelmann and Fernando Virdia and Andreas Wallner},
  year=2019
}