Authors: |
- Florian Stolz , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
- Nils Albartus , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
- Julian Speith , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany; Max Planck Institute for Security and Privacy, Bochum, Germany
- Simon Klix , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
- Clemens Nasenberg , Max Planck Institute for Security and Privacy, Bochum, Germany
- Aiden Gula , University of Massachusetts Amherst, MA, USA
- Marc Fyrbiak , Max Planck Institute for Security and Privacy, Bochum, Germany; emproof, Bochum, Germany
- Christof Paar , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany; Max Planck Institute for Security and Privacy, Bochum, Germany
- Tim Güneysu , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
- Russell Tessier , University of Massachusetts Amherst, MA, USA
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Abstract: |
Over the last decade attacks have repetitively demonstrated that bitstream protection for SRAM-based FPGAs is a persistent problem without a satisfying solution in practice. Hence, real-world hardware designs are prone to intellectual property infringement and malicious manipulation as they are not adequately protected against reverse-engineering.In this work, we first review state-of-the-art solutions from industry and academia and demonstrate their ineffectiveness with respect to reverse-engineering and design manipulation. We then describe the design and implementation of novel hardware obfuscation primitives based on the intrinsic structure of FPGAs. Based on our primitives, we design and implement LifeLine, a hardware design protection mechanism for FPGAs using hardware/software co-obfuscated cryptography. We show that LifeLine offers effective protection for a real-world adversary model, requires minimal integration effort for hardware designers, and retrofits to already deployed (and so far vulnerable) systems. |