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Papers from CHES 2000
Year
Venue
Title
2000
CHES
A 12 Gbps DES Encryptor/Decryptor Core in an FPGA
Steven Trimberger
Raymond Pang
Amit Singh
2000
CHES
A 155 Mbps Triple-DES Network Encryptor
Herbert Leitold
Wolfgang Mayerwieser
Udo Payer
Karl C. Posch
Reinhard Posch
Johannes Wolkerstorfer
2000
CHES
A Comparative Study of Performance of AES Final Candidates Using FPGAs
Andreas Dandalis
Viktor K. Prasanna
José D. P. Rolim
2000
CHES
A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals
Takehiko Kato
Satoru Ito
Jun Anzai
Natsume Matsuzaki
2000
CHES
A Dynamic FPGA Implementation of the Serpent Block Cipher
Cameron D. Patterson
2000
CHES
A High Performance Reconfigurable Elliptic Curve Processor for GF(2<sup>m</sup>)
Gerardo Orlando
Christof Paar
2000
CHES
A Scalable and Unified Multiplier Architecture for Finite Fields GF(<i>p</i>) and GF(2<sup>m</sup>)
Erkay Savas
Alexandre F. Tenca
Çetin Kaya Koç
2000
CHES
A Timing Attack against RSA with the Chinese Remainder Theorem
Werner Schindler
2000
CHES
An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture
James Goodman
Anantha Chandrakasan
2000
CHES
Cryptographic Hardware and Embedded Systems - CHES 2000, Second International Workshop, Worcester, MA, USA, August 17-18, 2000, Proceedings
2000
CHES
Data Integrity in Hardware for Modular Arithmetic
Colin D. Walter
2000
CHES
Differential Power Analysis in the Presence of Hardware Countermeasures
Christophe Clavier
Jean-Sébastien Coron
Nora Dabbous
2000
CHES
Efficient Generation of Prime Numbers
Marc Joye
Pascal Paillier
Serge Vaudenay
2000
CHES
Fast Implementation of Elliptic Curve Defined over GF(<i>p</i><sup>m</sup>) on CalmRISC with MAC2424 Coprocessor
Jae Wook Chung
Sang Gyoo Sim
Pil Joong Lee
2000
CHES
High-Speed RSA Hardware Based on Barret's Modular Reduction Method
Johann Großschädl
2000
CHES
How to Explain Side-Channel Leakage to Your Kids
★
Invited paper
David Naccache
Michael Tunstall
2000
CHES
Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2<sup>m</sup>) on an FPGA
Souichi Okada
Naoya Torii
Kouichi Itoh
Masahiko Takenaka
2000
CHES
MiniPASS: Authentication and Digital Signatures in a Constrained Environment
Jeffrey Hoffstein
Joseph H. Silverman
2000
CHES
Montgomery Exponentiation with no Final Subtractions: Improved Results
Gaël Hachez
Jean-Jacques Quisquater
2000
CHES
Montgomery Multiplier and Squarer in GF(2<sup>m</sup>)
Huapeng Wu
2000
CHES
On Boolean and Arithmetic Masking against Differential Power Analysis
Jean-Sébastien Coron
Louis Goubin
2000
CHES
Physical Security Devices for Computer Subsystems: A Survey of Attacks and Defences
Steve H. Weingart
2000
CHES
Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems
M. Anwarul Hasan
2000
CHES
Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies
Adi Shamir
2000
CHES
Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards
Rita Mayer-Sommer
2000
CHES
Software Implementation of Elliptic Curve Cryptography over Binary Fields
★
Invited paper
Darrel Hankerson
Julio López
Alfred Menezes
2000
CHES
Software-Hardware Trade-Offs: Application to A5/1 Cryptanalysis
Thomas Pornin
Jacques Stern
2000
CHES
Using Second-Order Power Analysis to Attack DPA Resistant Software
Thomas S. Messerges